About this role
## Company:
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA
## Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in addition to developing in-house productivity & QoR automation solutions for improving overall design methodology.
Required for this Role:
- Bachelors or Masters in Electrical Engineering, Computer Science, or related field.
- Good understanding of CMOS fundamentals and Circuit Design Concepts
- Strong aptitude for programming and automation
- Good communication skills and ability to work collaboratively in a team environment
Preferred Qualifications:
· 2+ years of industry experience in CAD or PDK development
· Knowledge of Virtuoso suite of tools – Schematic, Layout, Analog Design Environment etc.
· Familiarity with SPICE simulation tools (Hspice, SpectreX/APS, AFS/Solido SPICE , PrimeSim SPICE, ADS, GoldenGate etc.)
· Proficiency in one or more of the programming/scripting languages – SKILL, Python, Perl and TCL.
· Experience with Electromagnic tools, like Peakview and EMX, is a plus.
· Knowledge of FinFet & SOI processes is a plus
Educational Requirements:
Required: Bachelor's, Electrical Engineerin
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field.
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