Senior Network HW System Engineer

<b>Overview</b><br><div><p><span>Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.</span><span> </span></p></div><div><p><span>Microsoft's Hardware Systems organization is developing AI-native silicon and system-level solutions to power the next generation of frontier AI models. The MAIA platform combines custom accelerators, advanced networking technologies, large-scale distributed infrastructure, and cloud-scale software to deliver industry-leading AI training and inference capabilities.</span><span> </span></p></div><div><p><span>The Platform Systems Engineering (PSE) team is seeking a </span><span>AI Network HW Systems Engineer</span><span> to drive the architecture, bring-up, validation, optimization, and deployment of networking infrastructure for next-generation MAIA AI systems. This role sits at the intersection of networking hardware, systems architecture, AI infrastructure, and hyperscale deployment.</span><span> </span></p></div><div><p><span>You will work across the entire networking stack, from high-speed SerDes interfaces, optics, cables, NICs, PHYs, and switch silicon to AI communication frameworks and distributed training workloads. You will collaborate with architects, silicon engineers, firmware developers, hardware designers, validation teams, OS developers, manufacturing partners, and Azure service teams to deliver scalable, reliable, and high-performance AI networking solutions.</span><span> </span></p></div><div><p><span>This is a unique opportunity to influence the future of AI infrastructure while enabling Microsoft's next generation of frontier-scale AI systems.</span><span> </span></p></div><div><p><span> </span></p></div><div><p><span><span>#azure</span><span> #MAIA</span><span> #AI/ML</span><span> #Networking Hardware </span></span><span> </span></p></div><br><br><b>Responsibilities</b><br><div><div><p><span>AI Networking Architecture &amp; Platform Development</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Define and drive networking architectures for MAIA AI training and inference platforms, spanning scale-up and scale-out deployments. Partner across architecture, silicon, firmware, software, and Azure infrastructure teams to deliver networking solutions from concept through datacenter deployment while influencing future networking roadmaps.</span><span> </span></p></li></ul></div><div><p><span>Network Hardware Integration &amp; System Bring-Up</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Lead the integration, bring-up, and deployment of network hardware technologies including switches, NICs, PHYs, high-speed SerDes interfaces, optics, cables, and backplane solutions. Collaborate with internal teams, ODMs, and technology partners to ensure successful qualification and production readiness.</span><span> </span></p></li></ul></div><div><p><span>AI Fabric Validation, Performance &amp; Reliability</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Define and execute validation strategies for AI networking infrastructure, including functional, performance, scale, interoperability, reliability, and stress testing. Develop automated qualification frameworks and methodologies to ensure robust operation in rack-scale and cluster-scale AI environments.</span><span> </span></p></li></ul></div><div><p><span>Performance Optimization &amp; Networking Efficiency</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Analyze and optimize AI fabric performance across distributed training and inference workloads. Evaluate latency, bandwidth utilization, congestion behavior, and collective communication efficiency, translating workload requirements into scalable networking solutions and architecture recommendations.</span><span> </span></p></li></ul></div><div><p><span>High-Speed Interconnect &amp; Emerging Technologies</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Drive qualification and deployment of next-generation networking technologies, including high-speed copper and optical interconnects, PAM4-based SerDes, advanced optics, and future networking innovations such as LPO, LRO, CPO, and silicon photonics. Evaluate technology tradeoffs across performance, power, reliability, and scalability.</span><span> </span></p></li></ul></div><div><p><span>Debug, Telemetry &amp; Automation</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Lead root-cause analysis of networking and AI fabric issues spanning physical layer, network protocols, and distributed AI communication layers. Develop telemetry, diagnostics, automation, and fleet monitoring solutions that improve network reliability, accelerate issue resolution, and enhance engineering productivity.</span><span> </span></p></li></ul></div><div><p><span> </span></p></div><div><p><span>Key Responsibilities</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Drive end-to-end architecture, integration, validation, and deployment of networking infrastructure for MAIA AI systems across scale-up and scale-out environments.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Partner with silicon, firmware, software, hardware, and Azure infrastructure teams to define networking requirements and deliver scalable, reliable, and high-performance AI fabrics.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Lead bring-up, qualification, and optimization of network subsystems including switches, NICs, PHYs, optics, cables, and high-speed SerDes technologies.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Develop validation and performance methodologies for AI networking infrastructure, ensuring readiness across functionality, scale, reliability, and stress conditions.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Drive root-cause analysis, telemetry, and automation solutions to improve network resiliency, operational efficiency, and fleet health.</span><span> </span></p></li></ul></div></div><div><div><ul style="list-style-type:disc"><li><p><span>Evaluate and influence next-generation networking technologies and architectures required to support future AI workloads and hyperscale deployments.</span><span> </span></p></li></ul></div></div><br><br><b>Qualifications</b><br><div><div><p><span>Preferred Qualifications</span><span> </span></p></div><div><p><span>AI Infrastructure Experience</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Experience developing GPU, FPGA, TPU, AI accelerator, or HPC-based systems.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Familiarity with AI workload communication patterns and collective operations.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Understanding of large-scale distributed AI training environments.</span><span> </span></p></li></ul></div><div><p><span>Optical &amp; Interconnect Expertise</span><span> </span></p></div><div><p><span>Deep knowledge of:</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Optical transceivers (DR4, DR8, FR4)</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>DSP architectures</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>TIAs and drivers</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Optical link budgets</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>OMA, TDECQ, receiver sensitivity analysis</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Silicon photonics technologies</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Co-packaged optics architectures</span><span> </span></p></li></ul></div><div><p><span>Industry Standards</span><span> </span></p></div><div><p><span>Experience with:</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>IEEE Ethernet standards</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>OIF specifications</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>CMIS management frameworks</span><span> </span></p></li></ul></div></div><div><div><ul style="list-style-type:disc"><li><p><span>Ultra Ethernet Consortium technologies</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Future 224G and 448G ecosystems</span><span> </span></p></li></ul></div><div><p><span>Datacenter &amp; Manufacturing</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Experience with hyperscale datacenter deployments.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Knowledge of ODM, CM, and supplier ecosystems.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Experience managing products through EVT, DVT, PVT, and production ramps.</span><span> </span></p></li></ul></div><div><p><span>Software &amp; Automation</span><span> </span></p></div><div><ul style="list-style-type:disc"><li><p><span>Experience with Linux environments and automation frameworks.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Background developing telemetry, diagnostics, validation, and qualification tooling.</span><span> </span></p></li></ul></div><div><ul style="list-style-type:disc"><li><p><span>Familiarity with scripting and data analysis environments.</span><span> </span></p></li></ul></div></div> <br><p>This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.</p><br><hr><br><p>Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html"><b><u>requesting accommodations.</u></b></a></p>