About this role
Job Summary
We are seeking a highly skilled and innovative Low-Voltage to Medium-Voltage Silicon MOSFET Design Engineer
to join our advanced technology development team. In this role, you will be responsible for the architecture, design, simulation, and optimization of next-generation power silicon MOSFETs, with a primary focus on shielded gate structures. Leveraging your deep expertise in semiconductor device physics and the Synopsys TCAD platform, you will drive innovations in device architecture to improve performance metrics such as Rds(on), switching losses, and ruggedness. You will collaborate closely with process integration, characterization, and product engineering teams to bring high-performance discrete power devices from concept to high-volume manufacturing.
Required Qualifications
- Education: Ph.D. in Electrical Engineering, Semiconductor Sciences, Materials Science, or a closely related discipline, with a research focus directly tied to power semiconductor devices.
- Experience: 3+ years of post-degree industrial or advanced academic research experience in silicon power MOSFET design and development.
- Device Physics Expertise: Deep theoretical understanding of semiconductor device physics, carrier transport, breakdown mechanisms, and power MOSFET dynamics (UIS, safe operating area, switching behavior).
- Advanced TCAD Skills: Proven expertise using the Synopsys TCAD suite for comprehensive process integration emulation and electrical device characterization.
- Problem-Solving & Communication: Strong analytical skills to diagnose complex device-level anomalies, paired with excellent communication skills to present technical data across multi-functional engineering teams.
Preferred Qualifications
- Experience with discrete power packaging technologies and their impact on device parasitic elements.
- Familiarity with reliability mechanisms specific to shielded gate power devices, such as shield oxide integrity, electromigration, and high-temperature stress testing (HTGB/HTRB).
- Knowledge of power electronics applications to better align device specifications with system-level requirements.