About this role
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in electrical engineering, coding, and emulation.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with EDA debug tools (e.g., Verdi, SimVision/Indago, GDB).
- Experience with programming and scripting in C, C++, Python, Perl, or TCL.
- Understanding of SoC architecture and interfaces (e.g., AXI, DDR, PCIe, etc.).
- Understanding of RTL to emulation/FPGA flows including emulation test benches (e.g., transactors/accelerated VIPs, hybrid, in-circuit emulation).
- Build full chip emulation or FPGA prototypes from complex SoC designs and deliver to multiple customers such as software, firmware, platform and post-silicon validation teams.
- Bring up system level emulation models through reset, boot, and bare metal content or OS.
- Influence the design and verification teams to add emulation friendly model development.
- Work with architects, designers, software engineers, pre and post-silicon verification engineers to develop test plans, coverage, and reproduce failures on emulation.
- Develop, execute, and debug full-chip/system on a chip (SoC) tests on Emulation platforms. Explore new verification and emulation methodologies and implement them.