About this role
Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR), Augmented Reality (AR) and Wearable AI Devices. The compute performance and power efficiency requirements of our AI devices require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will unlock personalized on-device AI capabilities and blend virtual, physical worlds on wearable devices. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.
We are seeking a software engineer to support the development of the compiler tool-chain for state-of-the-art deep learning hardware components optimized for AR/VR systems. You will be part of our efforts to architect, design and implement a clean slate compiler for this activity and will be part of a team that includes compiler, machine learning algorithms and software, firmware and ASIC experts. You will contribute to a full stack development effort compiling PyTorch models down to binaries for custom hardware accelerator blocks.
Responsibilities
Lead the architecture and implementation of ML compiler infrastructure, including intermediate representations (IR), optimization passes, and code generation targeting custom AI accelerators
Design and implement compiler transformations informed by hardware architecture constraints for GPU, TPU, and edge AI accelerators
Drive the development of LLVM/MLIR-based toolchains for compiling PyTorch models to optimized binaries for custom silicon
Work with hardware architects to co-design compiler features that maximize performance, power efficiency, and programmability for edge devices
Analyze and improve the efficiency, scalability, and stability of compiler toolchains, ensuring they can be extended to new hardware targets
Lead technical roadmapping for compiler infrastructure initiatives, coordinate execution across teams, and mentor engineers on compiler design patterns
Conduct design and code reviews, evaluate code performance, and drive resolution of compiler and cross-disciplinary system issues
Interface with other compiler-focused teams (PyTorch, ExecuTorch) to evaluate and incorporate innovations
Qualifications
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
3+ years of experience in developing compilers, toolchains, or code optimization software
Experience with LLVM, MLIR, or similar compiler infrastructure frameworks
Experience in designing intermediate representations and implementing compiler optimization passes
Experience with hardware architectures such as GPUs, TPUs, or custom AI accelerators
Experience in software development using C++ for compiler and systems-level programming
Experience leading end-to-end technical design and delivery of compiler infrastructure initiatives across multiple teams Experience developing in ML frameworks such as PyTorch or TensorFlow at the system level
Experience co-designing software and hardware features with silicon architecture teams
Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Experience with ExecuTorch, TensorRT, XLA, or similar ML compilation and deployment frameworks
Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
Experience with power and performance optimization for resource-constrained edge devices
Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
Experience with machine-code generation or compiler back-ends targeting edge or on-device inference workloads
