Senior Systems Engineer

MicrosoftMountain View, CaliforniaOn-siteFull-timeSenior, 5–8 yearsListed 4 days ago

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About this role

<b>Overview</b><br><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. </span></p></div><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Microsoft's Hardware Systems organization is developing AI-native silicon and hyperscale systems designed to power the next generation of frontier AI models. The MAIA platform combines custom silicon, high-performance networking, advanced compiler technologies, and large-scale system infrastructure to enable industry-leading AI training and inference. </span></p></div><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">The Platform Systems Engineering (PSE) team is seeking an experienced Systems Engineer who will work directly with engineers across cross-functional teams and deliver hardware designs from concept to datacenter deployment.  Responsibilities will include interacting directly with Microsoft’s services teams, cross-disciplined design teams focusing on the functional interfaces and developing test cases and qualifying the designs.  This is an opportunity to leverage and grow your existing hardware design/validation experience and provide innovative E2E hardware solutions to Microsoft Cloud. </span></p></div><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">You will work closely with silicon architects, compiler teams, runtime developers, performance engineers, validation teams, and AI framework developers to translate platform requirements into scalable tooling and workload solutions. </span></p></div><div><p><span style="font-size: 10.0pt;">Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.  </span></p></div><br><br><b>Responsibilities</b><br><div><ul><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Collaborate with architecture, silicon engineering, firmware, hardware design and validation, operating systems, manufacturing, and customer teams to build state-of-the-art AI, compute, storage, networking, and accelerator hardware solutions.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Analyze new interfaces and subsystems, develop integration plans, evaluate power efficiency, debug integration issues, and provide technical recommendations.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Define system behavior and platform concepts of operation to ensure compatibility with Microsoft Azure datacenter software, serviceability, telemetry, and customer expectations.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Perform new, unique, different, and difficult (NUDD) technology and feature analysis, and provide risk assessments and mitigation recommendations.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Drive technical requirements and ensure solutions are flexible and scalable across the hardware, firmware, and software stack.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Drive platform- and solution-level technical discussions, contribute to product architecture, and deliver against product goals for quality, reliability, and performance.</span></li><li><span style="font-family:arial, helvetica, sans-serif;font-size:10.0pt">Collaborate with internal, external, and open-source partners to seamlessly onboard innovative technologies.</span></li></ul></div><br><br><b>Qualifications</b><br><div><div> </div><div><p><strong><span style="font-size: 10.0pt;">Required Qualifications: </span></strong></p><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 5+ years technical engineering experience OR equivalent experience.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">5+ years of hands-on experience with ARM- or x86-based server hardware architecture, SoC development, high-speed interfaces such as DDR, HBM, PCIe, or Ethernet, and hardware, firmware, and operating system interactions.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">5+ experience troubleshooting complex system-level issues and conducting root-cause analysis across areas such as board hardware, signal integrity, CPLD/FPGA, thermal, firmware, or operating system components.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">5+ of experience with platform-level test architectures and debugging tools such as Lauterbach, Arium, ARM JTAG tools, OpenOCD, or programming or scripting languages such as <span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Perl, Python, or shell scripting.</span></span></li></ul></div><div><div> </div><div><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><strong>Other Qualifications:</strong></span></div><div><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"> </span></div><div><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings:</span></div><div> </div><div><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.  </span></li></ul></div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"> </span></p></div></div><div><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><strong>Preferred Qualifications: </strong></span></p></div><div><ul><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience</li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Experience with post-silicon validation, platform bring-up, system integration, or server platform validation.</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Experience evaluating OEM hardware designs, including hardware, firmware, and operating system interactions, platform configuration trade-offs, performance tuning, or optimization.</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Experience with high-speed interfaces and technologies such as CXL, PCIe, DDR, E1.S, or Ethernet.</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Experience with Windows or Linux operating systems, system firmware such as BIOS or BMC, or hardware and software system security.</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Experience with workload measurement methodologies or benchmarks such as SPEC CPU, Linpack, or FIO.</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Understanding of AI and machine learning workloads or experience validating related software stacks, such as TensorFlow.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">Effective written and verbal technical communication skills, including experience collaborating with cross-functional technical teams.</span></li></ul></div><div><div><p> </p></div><div><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10.0pt;">#azure #MAIA #AI/ML </span></p></div></div></div> <br><br><p>Hardware Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year. </p><p></p> <p>Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:<br><a href="https://careers.microsoft.com/us/en/us-corporate-pay">https://careers.microsoft.com/us/en/us-corporate-pay</a></p><br><p>This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.</p><br><hr><br><p>Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html"><b><u>requesting accommodations.</u></b></a></p>