About this role
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product.
Do you have an uncommon desire to seek out and solve exceedingly difficult challenges rather than the easy ones? Do you believe that truly valuable and meaningful accomplishments are the result of pushing the limits of perseverance? Do you believe that a world-class team with relentless drive can surpass even their own high expectations? We do! But we also realize this job isn’t for everyone. What we do isn’t easy but you don’t take the easy path. In this highly visible role, you will be at the center of a chip design effort collaborating with all fields, with a critical impact on getting functional products to millions of customers quickly. As a memory sub-system verification engineer, you will have the responsibilities as follows:
Minimum Qualifications
- BS, MS, or Ph.D. in Computer/Electrical Engineering is required.
Preferred Qualifications
- The ideal candidate should have 2+ years of processor verification experience.
- In-depth knowledge of digital logic design, CPU and SOC architecture/micro-architecture and memory subsystem
- Strong programming (C/C++, Verilog, Scripting), Software optimization and performance improvement skills.
- Experience in unit and full chip level test benches
- Experience in developing testplans, assertions and developing stimulus
- Should be an extraordinary teammate with excellent communication skills, be able to work independently on the verification efforts for a block/area of the design.
- Experience with emulation and developing synthesizable transactors is a plus