About this role
Principal Post-Silicon System Validation Engineer
Position Summary
The Principal Post-Silicon System Validation Engineer is responsible for defining and executing system-level validation strategies for Power Management Devices (PMD), ensuring robust product performance and quality from first silicon through production release. This individual contributor role requires deep expertise in semiconductor validation, power electronics, automation, characterization, and silicon debug.
#LI-VS1
Qualifications
- BS/MS/PhD in Electrical Engineering or related discipline.
- Grade 12: 5+ years of post-silicon validation, characterization, or systems engineering experience.
- Grade 13: 8+ years of experience with recognized technical leadership in validation and power management systems.
- Strong knowledge of analog/mixed-signal circuits, power electronics, automotive systems, and semiconductor validation methodologies.
- Expertise with laboratory instrumentation, automation, and debug techniques.
- Experience with LabVIEW, Python, and automated test systems.
Preferred
- SmartFET, eFuse, Gate Driver, SBC, or automotive validation experience.
- Functional Safety, ISO 26262, ISO 21780, SiC/GaN, and AI-assisted validation experience.
#LI-VS1