Hardware Engineer, AI Accelerator Module Design

The Hardware Design, Rack-scale Technology and Platforms (HDRTP) engineering team designs, develops, validates, and delivers the hardware platforms that power Meta's AI and HPC infrastructure, deployed in data centers worldwide. Our designs are published for industry adoption through the Open Compute Project Foundation. We are seeking an AI Accelerator Module Design Engineer to own the electrical and PCB design of accelerator modules supporting Meta's custom silicon (MTIA) and third-party AI accelerators. You will own module-level electrical design end to end from requirements and ASIC package-to-board co-design through schematic, stackup, power delivery, bring-up, and volume production on one or more programs. You will work within established design methodologies and reference architectures, and contribute improvements to them. You will drive cross-domain trade-offs between signal integrity, power integrity, thermal, mechanical, and cost, partnering with senior engineers and architects on the most ambiguous decisions. You will operate independently on your program's scope in a fast-moving environment.

Responsibilities

Own the electrical design and PCB implementation of AI accelerator modules for high-performance, high-power custom silicon (MTIA) and third-party accelerators
Contribute to module requirements and specifications in partnership with ASIC, platform, rack, and systems architecture teams
Execute ASIC package-to-board co-design, including breakout routing, substrate interaction, and escape feasibility analysis for high pin-count devices
Design power delivery networks for high-current loads, including DC-DC topology selection, decoupling strategy, and plane/stackup partitioning
Implement high-speed interface design across PCIe Gen5/Gen6, CXL, DDR5/LPDDR, HBM, and Ethernet up to 800G, including simulation-guided stackup and channel budgeting
Partner with Signal and Power Integrity teams on SI/PI analysis and simulation-to-measurement correlation for your designs
Participate in and prepare module-level design reviews; ensure schematic, layout, and DFM/DFT readiness for your designs
Lead board bring-up and debug; root-cause electrical, power, and interoperability failures and drive design fixes to closure
Work with ODM/JDM partners through NPI-to-mass-production cycles, holding partners to Meta design standards and schedule
Contribute to reusable reference designs, design-rule libraries, and design automation; support publication through the Open Compute Project
Evaluate emerging technologies with industry partners – HDI and advanced substrates, embedded components, novel materials
Collaborate across hardware, firmware, mechanical, thermal, and manufacturing teams to resolve cross-functional issues
Share knowledge and help onboard other PCB/module design engineers

Qualifications

BS in Electrical Engineering, Computer Engineering, or a related technical discipline
6+ years of experience in electrical and PCB design for high-speed, high-power digital systems (servers, accelerators, networking, or HPC)
Experience taking at least one complex custom board or module design from concept through volume production
Proficiency with EDA tools for schematic capture and PCB design (Cadence Allegro/OrCAD, Altium Designer, or equivalent)
Experience with high-speed digital interface design (PCIe, CXL, DDR4/DDR5, HBM, Ethernet 25G+) and SerDes-based channel design
Experience with power delivery network design for high-current loads, including DC-DC topology selection and decoupling strategy
Experience with board bring-up, debug, and failure analysis using oscilloscopes, VNAs, TDR, and power analyzers
Experience communicating technical trade-offs clearly in writing and verbally 8+ years of experience in module or board design for AI/ML accelerators, data center, or HPC hardware
MS in Electrical Engineering with emphasis on electromagnetics, signal integrity, or power electronics
Scripting or design-automation experience (Python, SKILL/LISP, or equivalent)
Experience collaborating across hardware, firmware, mechanical, thermal, and manufacturing teams
Exposure to ASIC or GPU package-to-board co-design and breakout routing for high pin-count devices
Contributions to open-source hardware or the Open Compute Project, or external technical publications
Experience with liquid-cooled or thermally-constrained module design
Hands-on experience with SI/PI simulation tools (Ansys HFSS, Cadence Sigrity, Keysight ADS/PathWave, or equivalent)
Experience with HDI, rigid-flex, embedded component, or advanced substrate technologies
Experience designing accelerator modules for custom in-house silicon
Experience working with external ODM/JDM or component partners
Experience with next-generation interconnect: PCIe Gen6, CXL 3.x, UCIe, scale-up fabrics, or co-packaged optics