About this role
1. Defining architectures of electrical and optical SerDes transceivers that comply with IEEE and OIF standards.
Building end-to-end link models covering the TX/RX chain across EIC, optical/fiber channel, and PIC (e.g., MRM, PD), evaluating link budget and signal quality, and conducting simulations for performance benchmarking and sign-off.
2. Developing DSP architectures and algorithms such as calibration and compensation of optical and electrical impairments, synchronization and gain control loops, and adaptive equalizers.
3. Collaborating with circuit, photonics, hardware, and verification teams for product development and ensuring the outcome meets performance and power targets.
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