ASIC Design/Integration Engineer

AppleCupertino, CaliforniaOn-siteFull-timeMid level, 2–5 yearsListed 2 hours ago

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About this role

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers.

As an ASIC Design/Integration Engineer, your responsibilities span various aspects of SOC design:

- Write microarchitecture and design specifications
- Design, implement, and debug complex logic designs
- Integrate complex IPs into the SOC
- Support all front-end integration activities like Lint, CDC, RDC, Synthesis, and ECO
- Work with other specialists across the SOC Design, Verification, Emulation, STA, and Physical Design teams
- Collaborate with software and systems teams to ensure high quality

Minimum Qualifications

BS and a minimum of 3 years of relevant industry experience

Preferred Qualifications

Verilog RTL logic design experience
Proven experience and solid knowledge in CDC and low-power methodologies
Familiarity with scripting languages like Perl, Python, or Tcl
Familiarity with GenAI tools and workflows
Experience writing specifications and converting them into design
Experience with multiple clock domains and asynchronous interfaces
Hands-on experience across the entire chip development process with proficiency in front-end tools and methodologies
Experience with or knowledge of system architecture, CPU & IP integration, and power/clock management design
Strong communication skills across cross-functional internal teams
Familiarity with software and operating system concepts is a plus