About this role

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission. The Azure Memory & Storage (AMS) Commodity Quality and Validation Engineering (CQVE) team is responsible for ensuring storage device quality, reliability, and compliance before deployment at Azure scale. We are seeking a Lead Engineer to drive the Certified Device List (CDL) qualification program for hard disk drives (HDDs), solid state drives (SSDs), and PCIe switches. This role will lead qualification and validation strategy, develop and enhance test suites, translate industry and Microsoft requirements into comprehensive test procedures, partner closely with suppliers, and drive continuous quality improvements based on fleet learnings.The successful candidate will play a key role in delivering high-quality, reliable, and secure storage and PCIe solutions that meet Azure performance, compatibility, and reliability requirements while preventing validation escapes and fleet-impacting issues. Responsibilities <ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Translate Microsoft, OCP, security, reliability, and platform requirements into comprehensive HDD, SSD, and PCIe Switch validation strategies, test plans, and qualification procedures.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Design, develop, automate, and maintain CDL test suites covering functionality, performance, reliability, error handling, recovery, power, security, interoperability, and fleet-specific scenarios.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Analyze fleet learnings, field incidents, and validation escapes to identify coverage gaps, reproduce failures in the lab, and continuously improve validation methodologies and test coverage.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Partner with HDD, SSD, and PCIe Switch suppliers to review qualification results, debug failures, drive root-cause analysis and corrective actions, and ensure compliance with Microsoft quality and certification requirements.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Validate storage and PCIe solutions across component, subsystem, and platform levels, including firmware, driver, hardware, and system interactions.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Lead cross-functional technical discussions with storage architecture, platform, firmware, driver, reliability, and datacenter engineering teams to resolve complex storage and PCIe issues.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Drive qualification readiness for next-generation HDD, SSD, NVMe, and PCIe Switch technologies, ensuring solutions meet Azure reliability, performance, security, compatibility, and serviceability requirements.</li><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Influence validation standards and supplier methodologies, while mentoring engineers and providing technical leadership in storage and PCIe validation.</li></ul> Qualifications Required/minimum qualifications<ul style="margin-bottom: 0in; margin-top: 0px;"><li style="margin: 0in 0in 0in 0px; line-height: normal; font-size: 12pt; font-family: Aptos, sans-serif;">Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 7+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience</li></ul> Other Requirements <ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. </li></ul> Preferred Qualifications <ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">8+ years of experience working with enterprise storage technologies, including HDDs, SSDs, SAS, SATA, PCIe or NVMe devices, with demonstrated expertise in storage architecture, performance, reliability, and failure analysis. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">5+ years of experience leading development of validation strategies, qualification programs, test methodologies, or automated test frameworks for hardware products. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Proven experience leading cross-functional technical initiatives and influencing product quality, validation requirements, or engineering roadmaps across suppliers, partners, and internal engineering organizations. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Meaningful hands-on experience working with server platforms and storage subsystems. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Understanding of SSD/HDD/PCIe architecture, storage fault modes, error handling, and recovery mechanisms. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Familiarity with industry-standard PCIe and PCIe Switch architecture, protocols, topology, and error handling. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Hands-on experience debugging and analyzing PCIe/PCIe Switch errors and interoperability issues. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Windows/Linux driver or kernel development/debugging experience using C/C++. </li></ul><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-bottom: 0in; line-height: normal; margin-top: 0in; margin-right: 0in; font-size: 12pt; font-family: Aptos, sans-serif;">Exposure to SSD firmware development, firmware validation, and firmware/host interaction. </li></ul>#azurehwjobs #SCHIE #AMS #DRAM #memory #HDD #PCIe Switch #SAS #SATA #NVMe #storage Hardware Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: <a href="https://careers.microsoft.com/us/en/us-corporate-pay">https://careers.microsoft.com/us/en/us-corporate-pay</a> This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. <hr> Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html">requesting accommodations.</a>