Senior Application Engineer (RTL-to-GDSII digital implementation)

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in the trenches of physical implementation, running RTL-to-GDSII flows on designs that cannot afford to miss their PPA targets. You know that the difference between a CPU that tapes out on schedule and one that does not often comes down to a synthesis strategy chosen in week two or a floorplan decision that ripples through every subsequent stage. You have debugged enough timing violations and congestion hotspots to recognize patterns before they become problems.

Working with high-performance compute designs excites you because the stakes are real and the constraints are unforgiving. You do not just run tools, you understand what is happening under the hood well enough to explain why a particular approach will or will not work for a customer's Arm CPU block at 3nm. When a customer hits a wall, you are the person who can sit with their data, reproduce the issue, and walk out with a path forward that their team can actually execute.

You are comfortable being the bridge between a frustrated design team in Shanghai and an R&D engineer in Mountain View. You translate customer pain into requirements that make sense to product teams, and you turn new tool features into deployment strategies that customers trust. At Synopsys, you will work on the designs that power the next generation of processors, and the solutions you build will show up in silicon.

What You'll Be Doing

- Drive technical engagements with customers across Asia-Pacific on high-performance compute designs including Arm and RISC-V CPUs, GPUs, and DSPs using advanced nodes from 7nm to 3nm
- Deploy and optimize Fusion Compiler implementation flows to solve PPA challenges on real customer designs, working through synthesis, place-and-route, and signoff closure
- Develop and debug RTL-to-GDSII methodologies in collaboration with customer design teams, identifying bottlenecks in timing, power, and area and delivering solutions that work in production
- Reproduce customer design issues in-house, isolate whether the root cause is design-related or tool-related, and provide actionable solutions with clear technical justification
- Translate customer findings and pain points into detailed enhancement requests for Synopsys R&D, ensuring that product improvements reflect real-world deployment needs
- Enable customer migration to new EDA tool versions by validating flows, benchmarking PPA results, and building confidence in adoption through hands-on proof points
- Act as the customer advocate internally and the Synopsys product expert externally, balancing both perspectives to drive successful outcomes

The Impact You Will Have

- Your deployment work will directly influence whether customers achieve their PPA targets and tape-out schedules on some of the most complex processor designs in the region
- The methodologies you develop will become repeatable solutions that scale across multiple customer engagements and design teams
- Your technical feedback will shape Fusion Compiler product roadmaps, ensuring that future releases address the real challenges faced by HPC design teams
- Customers will adopt newer tool versions with confidence because you have proven the path forward with their own design data
- Your ability to isolate and resolve issues quickly will reduce customer escalations and keep critical projects on track
- The relationships you build with key customers will expand Synopsys footprint in the Asia-Pacific HPC market
- Your collaboration with R&D will accelerate the time from feature request to deployed solution, closing the loop between customer need and product capability

What You'll Need

- Master's or Bachelor's degree in Electrical Engineering or equivalent technical discipline with 3+ years of hands-on experience in digital design or EDA applications
- Direct experience with synthesis and physical implementation flows, you have worked through place-and-route, timing closure, and signoff on real designs
- Strong debugging skills across the RTL-to-GDSII flow, you know how to trace a problem from symptom to root cause using log files, reports, and design data
- Proficiency in scripting with Tcl, Unix shell, or Perl to automate flows, parse reports, and manipulate design data
- Ability to manage technical projects from scoping through delivery with guidance, meeting deadlines and communicating status clearly
- Experience with Synopsys synthesis or implementation tools such as Fusion Compiler, Design Compiler, or IC Compiler is a strong plus
- Excellent communication skills in English and Mandarin, you can explain a complex technical tradeoff to a customer engineer and to a Synopsys R&D developer with equal clarity

Who You Are

- You are self-motivated and do not wait for someone to tell you what to investigate next, when you see a gap in a flow or a recurring customer question, you dig in
- You can take a vague customer complaint like "timing is not closing" and turn it into a structured debug plan with clear hypotheses and next steps
- You are comfortable presenting technical content to customer teams, walking them through a methodology change or a new feature with enough detail to build trust
- You know when to push back, if a customer request does not make technical sense or an R&D proposal will not work in the field, you say so and explain why
- You treat customer data with care and urgency, you understand that the design files you are working with represent months of their effort and millions of dollars in project investment
- You can context-switch between multiple customer engagements without losing track of commitments, and you keep stakeholders updated without being asked

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.