About this role
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits
Learn more about benefits at Google (https://www.google.com/about/careers/applications/benefits/).
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 10 years of experience with CPU microarchitecture design and performance modeling.
- Experience with software performance analysis and improvement, and high performance computer architectures (e.g., CPU, memory subsystem, multiprocessing).
- Experience in performance modeling, performance analysis, workload characterization, or PPA optimization.
- Experience in C/C++ or other scripting languages.
Preferred qualifications:
- PhD degree in Electrical Engineering, Computer Engineering, or Computer Science with a focus on computer architecture.
- Experience leading CPU microarchitectural exploration, defining specifications, and building high-fidelity C/C++ performance models.
- Experience with modern processor instruction set architectures (ISAs) such as ARM, RISC-V, or x86.
- Experience with system software stacks, including operating system kernels (Linux), device drivers, and runtime environments.
- Experience guiding technical strategy and mentoring engineers.
- Ability to communicate in English fluently to support client relationship management in this region.
- Develop innovative microarchitectural features to significantly enhance CPU performance.
- Model complex core microarchitectural concepts and evaluate Performance, Power, and Area (PPA) trade-offs to deliver a buildable, production-ready microarchitecture.
- Define and document comprehensive CPU subsystem microarchitecture specifications.
- Lead cross-functional collaboration with RTL, physical design, and verification teams to ensure a high-performance, power-efficient CPU implementation.
- Drive performance correlation between the performance model and RTL implementation and perform pre-silicon and post-silicon performance bug triage.