Analog Design Architect

onsemi is seeking an Analog Design Architect with a strong architecture and technical strategy focus to join its Core Analog IP Development Centre of Excellence in Cork, Ireland. You will shape the architecture, strategy and development roadmaps for power, clock, monitoring and reset IP for the Treo platform in BCD65 technology, including bandgap references, LDOs, DC–DC regulators, oscillators and PLLs.

Your primary focus will be translating product-line needs and longer-term platform requirements into coherent IP architectures, reusable specifications and prioritised roadmaps. You will align stakeholders on technical direction, assess architectural trade-offs and guide engineering teams through implementation, validation and production readiness. Strong circuit-design expertise remains essential: you will contribute selectively to critical circuit development, feasibility studies and complex technical problem-solving rather than routinely owning every stage of block-level implementation. You will also mentor junior engineers and help ensure IP can be integrated and reused across the platform.

- A bachelor’s degree in electrical or electronic engineering, or a closely related discipline, with at least 15 years of relevant analog IC design experience; or a master’s degree in a relevant discipline with at least 8 years of relevant analog IC design experience.

- Demonstrated analog IP architecture and hands-on design experience with bandgap references, LDOs, DC–DC regulators, oscillators and PLLs, providing the technical depth to guide implementation and assess feasibility.

- A proven track record of taking several products through the full development lifecycle to mass production, including silicon evaluation, debugging and production support.

- Strong analog circuit fundamentals and practical expertise in transistor-level design, simulation, layout-dependent effects and post-layout verification.

- The ability to translate product and system requirements into robust, reusable analog IP architectures, interface definitions and specifications, with clear reasoning behind key technical trade-offs.

- Experience shaping IP strategy and development roadmaps, engaging product lines to reconcile competing requirements, prioritise capability investments and align near-term delivery with longer-term platform direction.

- Demonstrated experience mentoring junior engineers and providing technical guidance through design reviews.

- Strong communication and presentation skills, with the ability to explain complex technical concepts, present trade-offs and build alignment across engineering teams and product stakeholders.

- A solid understanding of how AI can contribute to analog design and layout, including practical use cases, limitations and the need for independent engineering verification.

Desirable Experience

- Experience in BCD technologies, particularly BCD65, and analog IP development for mixed-signal platforms.

- Experience with supply and voltage monitoring, power-on reset, brownout detection and power or clock sequencing.

- Experience defining reusable IP portfolios, configuration strategies and integration requirements across multiple product families.

- Practical experience with scripting, design-flow automation or evaluation of AI-assisted engineering tools.