About this role
<b>Overview</b><br><p style="margin:0.0cm 0.0cm 8.0pt;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif">Microsoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Skype, OneDrive, and the Microsoft Azure platform globally with its server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering trusted experiences to customers and partners worldwide, and we are looking for passionate engineers to help achieve that mission. </p><p style="margin:0.0cm 0.0cm 8.0pt;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif">Are you passionate about working on cutting edge technology in a team that embodies the growth mindset? Are you hoping to join an organization which is built on the mission “To empower every person and organization on this planet to achieve more”?</p><p style="margin:0.0cm 0.0cm 8.0pt;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif">The Firmware Center of Excellence org in SCHIE is responsible for building Hardware/Firmware for Azure Infrastructure. We are working on the next generation of Hardware/Firmware for server, silicon, and rack infrastructure with a focus on innovation in firmware technology to secure Azure infrastructure for Microsoft and their customers. <span style="color:black">Our team works closely with AI and Azure-Core teams for the architecture and development of Cobalt and Maia systems in Azure Data-centre.</span></p><p style="margin:0.0cm 0.0cm 8.0pt;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif">We are looking for a highly motivated Firmware Engineer-2 with a background in Firmware development in embedded systems.</p><p style="margin:0.0cm;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p><p style="margin:0.0cm;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:9.0pt;font-family:Verdana, sans-serif;color:black">#SCHIE</span></p><br><br><b>Responsibilities</b><br><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 0.0cm 0.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">You will contribute to the architecture and design of various firmware components, including driver interfaces (PCIe, SPI, I2C, I3C), system libraries needed for SoC bring-up, protocol and feature development of low-level hardware. </span></li></ul><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 0.0cm 0.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">You will be contributing to all phases of product development, from design through manufacturing and productization. </span></li></ul><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 0.0cm 0.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Perform system-level debugging and troubleshooting to identify and resolve complex hardware/firmware-related issues. </span></li></ul><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 0.0cm 0.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Collaborate with cross-functional teams including hardware architects and engineers, software developers, validation & integration and product managers to define firmware requirements and specifications. </span></li></ul><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 8.0pt 0.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Stay up to date with industry trends and advancements in cloud firmware technologies and provide recommendations for improvement. </span></li></ul><br><br><b>Qualifications</b><br><p style="margin-right:0.0cm;margin-left:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif"><strong><span style="font-size:9.0pt;font-family:Verdana, sans-serif">Required Qualifications</span></strong><span style="font-size:9.0pt;font-family:Verdana, sans-serif"> </span></p><p style="margin-right:0.0cm;margin-left:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Bachelors or higher in Computer Science, Computer Engineering, Electronics Engineering, or similar.</span></p><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">4+ years of professional experience in firmware development or embedded software development in a multicore environment.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Solid understanding of computer architectures including processors, buses, and memories.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Demonstrated experience of hardware and firmware architecture, design, and coding for solutions at scale.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Experience with SoC bring-up, platform initialization, board support package development, peripherals such as PCIe, I2C, SPI, USB, UART , OS primitives, memory management, scheduling, interrupts and multi-threading.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Good problem-solving and analytical skills.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Experience working with multiple teams on Root cause analysis, troubleshooting, and debugging skills resulting into solving complex Hardware/Firmware interface issues.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Self-motivated and able to work independently.</span></li><li style="margin-right:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif;margin-left:72.0px"><span style="font-size:10.5pt;font-family:'Segoe UI', sans-serif;color:#323130">Strong communication and collaboration skills, with the ability to work effectively in cross-functional teams.</span></li></ul><p style="margin-right:0.0cm;margin-left:0.0cm;font-size:12.0pt;font-family:'Times New Roman', serif"><strong><span style="font-size:9.0pt;font-family:Verdana, sans-serif">Preferred Qualifications</span></strong><span style="font-size:9.0pt;font-family:Verdana, sans-serif"> </span></p><ul style="margin-bottom:0.0cm;margin-top:0.0px"><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Experience with working from early concept of Platform Architecture & design </span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Prior experience of working in one or more of the following areas: </span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Hardware accelerator software design and development </span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">CPU Execution modes, security model, cache, coherency, Memory management and protection, interrupt controller, virtualization, and other related concepts </span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">Platform initialization, board support package Development & integration, low level drivers for peripherals such as I2C, I3C, eMMC, SPI, USB, UARTs etc</span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">RAS, Debug, Logging </span></li><li style="margin:0.0cm 0.0cm 8.0pt 24.0px;line-height:107%;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:10.5pt;line-height:107%;font-family:'Segoe UI', sans-serif;color:#323130">(RT)OS Scheduling and firmware development in multithreading SMP as well as in heterogeneous computing environment </span></li></ul><p><span style="font-size:9.0pt;line-height:107%;font-family:Verdana, sans-serif">Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.</span><span style="font-size:11.0pt;line-height:107%;font-family:Calibri, sans-serif"><br></span></p> <br><p>This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.</p><br><hr><br><p>Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html"><b><u>requesting accommodations.</u></b></a></p>