About this role
Job Description and Requirements
Alternate Job Titles
- DFT Application Engineer, Staff Level
- Staff Applications Engineer, Test Solutions
- Senior Application Engineer, Design for Test
- Staff Engineer, DFT and ATPG
- Applications Engineering Lead, Test and Diagnostics
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years in the trenches of digital IC design, and somewhere along the way you realized that the most elegant RTL in the world means nothing if you cannot test it in silicon. That realization stuck. Now you live at the intersection of design and test, where scan chains, ATPG patterns, and MBIST architectures are not just checkboxes but the difference between first-pass success and a costly respin.
You are the engineer customers call when their test coverage is not adding up or their bring-up is stuck. You do not just run tools, you understand the why behind the flow. You can look at a complex SoC with dozens of IP blocks and see the test access strategy that will actually work, not the one that looks good in a slide deck.
Collaboration energizes you. Whether you are sitting with a solution architect prototyping a new methodology or walking a customer through their first IEEE 1687 implementation, you bring clarity and confidence. You ask the right questions, you push back when something does not make sense, and you follow through.
At Synopsys, you will work on real designs with real stakes, supporting customers who depend on your expertise to get their chips out the door.
What You'll Be Doing
- Deliver end-to-end DFT solutions for customer designs ranging from mid-complexity ASICs to massive multi-IP SoCs, covering architecture planning, scan insertion, ATPG pattern generation, MBIST integration, and silicon bring-up support
- Provide technical guidance during early design phases, helping customers budget for test, plan DFT architectures, and avoid costly mistakes before RTL freeze
- Implement and validate scan, MBIST, and IEEE 1687 test solutions, running simulations, debugging failures, and ensuring coverage targets are met
- Join customer design reviews to understand their flows, identify gaps or risks, and recommend improvements grounded in real-world test methodology
- Prototype and validate next-generation DFT techniques in collaboration with solution architects, turning experimental ideas into production-ready workflows
- Deliver technical support that goes beyond ticket resolution: training sessions, flow optimization, account-level strategy, and diagnostics deep dives that build long-term customer trust
- Run product evaluations, competitive benchmarks, and live demos that help win new accounts and expand Synopsys footprint in automotive, consumer, and high-performance compute markets
The Impact You Will Have
- You enable first-time silicon success for customers by delivering robust, validated DFT solutions that catch defects before tapeout and streamline bring-up after fabrication
- You accelerate adoption of advanced test standards like IEEE 1687 and next-generation MBIST across industries where reliability is non-negotiable, including automotive and safety-critical applications
- You strengthen Synopsys' reputation as the go-to partner for test by consistently delivering measurable value: higher coverage, faster debug, shorter time to market
- You shape the future of DFT methodology by prototyping new approaches, validating them on real customer designs, and feeding insights back into product roadmaps
- You improve customer design flows in ways that compound over time, turning one-off wins into repeatable best practices that raise the bar across their engineering teams
- You transfer knowledge through training, documentation, and technical presentations that make customers and colleagues more capable and self-sufficient
- You contribute to competitive wins by demonstrating clear technical advantages in benchmarks and evaluations that matter to decision-makers
What You'll Need
- Bachelor's degree with 7+ years of hands-on experience, or Master's degree with 5+ years, in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related discipline
- Deep practical experience with RTL coding, DFT insertion flows, ATPG tools, and silicon bring-up, you have done this work yourself, not just managed it
- Strong command of scan architectures, fault models, pattern generation, simulation, and test access mechanisms across complex hierarchical designs
- Proven ability to handle DFT for large SoCs with multiple IP blocks, mixed clock domains, and challenging coverage requirements
- Working knowledge of IEEE 1149.1 (JTAG), IEEE 1500 (embedded core test), and IEEE 1687 (IJTAG) standards and how they apply in real designs
- Exposure to MBIST in automotive or safety-critical design environments is a strong plus, especially if you have worked with ISO 26262 or functional safety requirements
- Clear, confident communication skills for both technical deep dives with engineers and higher-level strategy conversations with program managers or executives
Who You Are
- You can walk into a customer meeting with incomplete information, ask three clarifying questions, and leave with a concrete action plan that everyone believes in
- You are comfortable context-switching between debugging a tricky scan chain issue in the morning and presenting a new test methodology to a VP in the afternoon without losing your thread
- When a prototype does not work the first time, you treat it as data, not failure, and you iterate until you understand what broke and why
- You manage multiple customer engagements at once without dropping details, because you have built systems (spreadsheets, trackers, rituals) that keep you organized and accountable
- You build trust quickly, customers and colleagues know that when you commit to something, it gets done, and if it cannot get done, you will tell them early with options
- You stay current because you are genuinely curious, you read papers, you try new tools, you ask your peers what they are seeing, and you bring that learning back into your work
The Team You'll Be Part Of
You will join the CSE Team within the Test Group at Synopsys, a global team of application engineers and solution architects focused on delivering DFT solutions that work in production. This team supports customers through every stage of their design journey, from early architecture discussions to post-silicon diagnostics. You will collaborate closely with solution architects prototyping new methodologies, field engineers managing account relationships, and R&D teams building the next generation of test tools. The work is technical, the problems are real, and the impact is visible in every chip your customers tape out.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.