Dsp Engineer

Job Title: DSP Engineer Job Description
We are seeking an experienced DSP Engineer to define communication system architectures and develop advanced digital signal processing algorithms for high-performance ASIC-based products. In this role, you will work at the system architecture level, create detailed system models, and drive the design from concept through implementation and verification. You will focus on digital communication systems, physical layer (PHY) development, and communication algorithm design, rather than FPGA development, embedded software, or robotics engineering. This position is ideal for someone who has personally developed communication algorithms and system architectures and enjoys collaborating closely with ASIC design and verification teams.
Responsibilities
- Define end-to-end communication system architectures for high-performance ASIC-based products.
- Design and develop DSP algorithms for digital communication systems and physical layer (PHY) implementations.
- Design and develop physical layer (PHY) communication systems and signal processing solutions for wireline and high-speed data communication applications.
- Create bit-accurate and fixed-point system models using C and MATLAB to accurately represent communication algorithms and architectures.
- Develop simulation environments to evaluate system performance, explore architectural trade-offs, and validate design decisions.
- Generate verification vectors to support ASIC design and verification teams and ensure accurate implementation of system models in hardware.
- Collaborate closely with ASIC implementation teams to translate system and algorithm models into RTL and final ASIC designs.
- Support system-level verification by correlating modeled performance against RTL and ASIC implementations and driving closure on discrepancies.
- Define architecture specifications, system requirements, verification strategies, and detailed test plans for communication subsystems.
- Develop golden models for key DSP and communication algorithms to serve as reference implementations for verification.
- Perform performance modeling and analysis of communication systems, including evaluation of equalization, timing recovery, channel estimation, and synchronization algorithms.
- Support lab bring-up and hands-on validation of ASIC-based communication systems, including comparison of measured and modeled performance.
- Work with cross-functional ASIC, verification, and hardware teams throughout the development lifecycle to ensure robust, high-performance system delivery.
- Contribute technical expertise in Ethernet, twisted-pair, and other wireline communication architectures to guide system design.
- Ensure that DSP and communication algorithms are optimized for ASIC implementation, including fixed-point representation and hardware efficiency considerations.
Essential Skills
- Bachelors degree with 8+ years, Masters degree with 6+ years, or PhD with 3+ years of relevant industry experience in a related field.
- Strong preference for candidates with a Masters or PhD in Electrical Engineering or a closely related discipline.
- Deep expertise in digital communication systems, including high-speed and wireline communication architectures.
- Deep expertise in digital signal processing (DSP) theory and practical implementation.
- Strong background in physical layer (PHY) architecture and PHY layer development.
- Proven experience in communication algorithm development, including designing and developing new algorithms rather than only implementing existing designs.
- Strong programming experience in C, with preference for C over C++.
- Experience using MATLAB to develop communication system models and perform algorithm development and analysis.
- Experience defining communication system architecture and developing DSP algorithms for ASIC-based products.
- Experience creating bit-accurate and fixed-point models for communication and DSP algorithms.
- Experience developing simulation environments to evaluate system performance and validate architectural decisions.
- Experience generating verification vectors and collaborating with ASIC implementation teams.
- Experience supporting ASIC implementation efforts and working closely with ASIC design and verification teams.
- Familiarity with ASIC architecture and development flows, including RTL correlation and validation.
- Hands-on lab validation experience for communication systems or ASIC-based products.
- Expertise in DSP algorithms such as equalization, timing recovery, channel estimation, synchronization, signal detection, and performance modeling.
- Experience with fixed-point modeling, golden model development, verification vector generation, and ASIC implementation support.
- Experience with Ethernet, twisted-pair communication systems, wireline communication architectures, high-speed data communications, and PHY layer development.
Additional Skills & Qualifications
- Advanced degree (Masters or PhD) in Electrical Engineering or closely related discipline is strongly preferred.
- Experience working on ASIC-based communication products in a cross-functional environment with ASIC, verification, and hardware teams.
- Experience defining verification strategies and detailed test plans for complex communication systems.
- background in golden model development for DSP and communication algorithms to support verification flows.
- Experience with RTL correlation and validation for communication and DSP blocks.
- Exposure to Ethernet and high-speed wireline standards and their impact on PHY and DSP design.
- Ability to independently drive architecture definition and algorithm development from concept through implementation.
- Strong analytical and problem-solving skills with the ability to evaluate trade-offs between performance, complexity, and implementation cost.
- Clear communication skills to document architecture specifications, requirements, and verification plans and to collaborate effectively across teams.
Work Environment
This role is based onsite five days per week in Irvine, CA. You will work closely with ASIC, verification, and hardware teams in a lab and office environment focused on high-performance ASIC-based communication systems. The position centers on system architecture, communication algorithm development, modeling, and verification support, rather than FPGA development, embedded software, or robotics engineering. You will use tools such as C and MATLAB for system and algorithm modeling, along with simulation and verification environments integrated into ASIC development flows. The environment emphasizes collaboration, technical depth in digital communications and DSP, and hands-on engagement with both models and lab validation of ASIC-based communication systems.
Job Type & Location
This is a Permanent position based out of Broomfield, CO.
Pay and Benefits
The pay range for this position is $100000.00 - $200000.00/yr. Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors. ESPP -- purchase shares at a 15% discount on the market price, up to $25k limit
401k -- company manthes at 100% of the first 6% of salary

As far as RSUs, I have recently seen Principal candidates receive one-time grants of approximately 4000 shares, vesting quarterly over 4 years. The grant is given not long after hiring (the timing varies depending on the precise hire date), and the first shares vest one quarter after the grant date. There is an opportunity for annual refresh grants.
Workplace Type
This is a fully onsite position in Broomfield,CO.
Application Deadline
This position is anticipated to close on Oct 12, 2026. About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without
regard to race, sex, age, color, religion, national origin, veteran status, disability,
sexual orientation, gender identity, genetic information or any characteristic protected
by law.

If you would like to request a reasonable accommodation, such as the modification or
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San Francisco Fair Chance Ordinance:
Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the
city and county of San Francisco, we will consider for employment qualified applicants
with arrest and conviction records.

Massachusetts Lie Detector:
It is unlawful in Massachusetts to require or administer a lie detector test as a
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shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI):
We may use Artificial Intelligence (AI) to support parts of our hiring process,
including sourcing, screening, and evaluating candidates. AI helps assess applications
and qualifications, but final decisions are made by our hiring team. By applying, you
acknowledge and agree that your application may be reviewed using AI tools.