Platform Validation Lead - IO Interfaces

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THE ROLE:

We are looking for a dynamic, energetic and passionate technical leader to join our growing datacenter CPU and AI post silicon validation team with expertise in the areas of highspeed IO such as PCI Express, CXL or RAS to drive the system validation and debug of AI GPU systems. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

KEY RESPONSIBILITIES:

- Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across AMD Server and AI products
- Leverage AI/ML technologies to enhance post-silicon validation, debug, and test automation efficiency, including development of AI-assisted workflows, data analytics, failure triage, log analysis, and intelligent root-cause identification.
- Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing
- Exposure to functionally validating, regressing, executing and debugging Networking/IFoE/IB/UAL/Scale up/Scale out or related domains
- Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
- Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment. Drive the provide root cause analysis for platform level, SoC logical, performance and BIOS/firmware issues

PREFERRED EXPERIENCE:

- Domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management drive comprehensive system level test-plan execution
- Strong understanding of Server platform components, x86 or other complex CPU architectures. Proficiency with Linux and/or Microsoft Operating Systems is a plus.
- Experience developing validation test-plans, execution and strong debug skills at SoC/Platform level.
- Participated in silicon bring up and debug, support to internal engineering teams
- Familiarity with programming / scripting language (C/C++, Python, Perl, ...)
- Extensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization
- Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools.
- Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines.
- Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization.
- Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus.

ACADEMIC CREDENTIALS:

- BSEE/CSE/CS with 8+ years of experience or
- MSEE/CSE/CS with 6+ years of experience

LOCATION:

Austin, TX

This role is not eligible for visa sponsorship.

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Benefits offered are described:  AMD benefits at a glance .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.