Staff Analog IC Design Engineer

onsemiBengaluru, KarnatakaOn-sitePart-timeMid level, 2–5 yearsListed 1 hour ago

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About this role

Analog Staff Design Engineer

About Us

At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our team in Bangalore develops high speed communications chips for automotive applications. We invite you to join our innovative team and contribute to the growth of Bangalore design center.

The Role

As part of the Sensor Interface Division, the Design Team in Bangalore develops and brings to production low-power high speed mixed-signal ICs for automotive Ethernet and automotive serdes. We are looking to expand our design team with an Analog IC Design Engineer with PLL design experience. You will architect, specify and implement PLL and other sub systems and help in PLL chip-level integration, chip-level simulations and silicon validation for the above mentioned high speed communication chips.

Why Join Us

We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. You will be entitled a very competitive benefit package. You will be able to build up a career in successful international company, and you can participate in interesting international projects.

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What You’ll Need

- Must have a BSEE, MSEE or Ph.D. with at least 6-10 + years of IC design work experience

- Extensive experience in high performance complete PLL design from scratch is required with at least 1 tape out & silicon success.

- Experience in designing low phase noise/jitter integer PLLs, fractional-N synthesizers.

- Good knowledge of band gaps, bias, opamps, LDOs, feedback and compensation techniques.

- Experience in VCO design including but not limited to LC VCOs.

- Must have Strong knowledge of loop design to optimize for phase noise/jitter, lock time, reference spur, area, power.

- Good knowledge of low noise design techniques.

- Good knowledge of high precision techniques in presence of device mismatch

- Experience in C/Matlab/VerilogA modeling

- Understand device physics and demonstrated ability to apply that to optimize noise, power, area, and frequency of PLL blocks.

- System knowledge of Automotive serdes/ethernet and its link budget analysis will be added advantage

- Good working experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs.

- Experience in working with production test engineers to firm up test plans and design for testability details.

- Experience with IP integration and Mixed-Signal IC verification

- Good English written and verbal communication skills.

What Else You May Bring

- Experience with:

Leading project activities

- Lab measurements and characterization equipment

- Scripting languages

- Digital design

If you match our profile and you are interested in joining our dynamic team of professionals, please contact - [email protected]

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