About this role
#WeAreIn for jobs that impact everyone's life.
Join the thinkers, builders, and problem solvers behind tomorrow’s technology.
As a SoC Physical Implementation Engineer in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.
Are you in?
Your role Key responsibilities in your new role
You will join a dynamic and growing team where you will own the Digital Physical Design work packages.
- Perform Floor planning, Partitioning, Placement & Routing at chip & block level
- Optimization of Timing, Power, Area according to the design specifications
- Achievement of Timing Closure and execution of Verification and Sign-off
- Development of P&R scripts for development flow automation
- Close Cooperation with digital design and synthesis team and analog layout team for smooth execution in a mixed Digital and Analog development flow
- Participation in Design Reviews , FMEA , and generation of Design Reports
- Effort estimation, planning of related work package, i nterfacing of project team
Your profile Qualifications and skills to help you succeed
You are a highly motivated and results-driven team player with strong analytical and problem-solving skills. You thrive in international and cross-functional environments, using your creative and open-minded approach to drive innovation, collaboration, and successful outcomes.
- A degree in Electrical/Electronic Engineering or equivalent field of study with specific knowledge of microelectronic devices and related digital circuit design
- At least 3 years of experience in implementing SoC designs from RTL to GDS , preferred in a UNIX environment
- Solid Experience of the RTL to GDS flow : synthesis, P&R, STA and sign-off checks in sub-micron technologies using either the Synopsys or Cadence tool chain
- Previous experience with physical design work-packages planning , including effort estimation, and risk management
- Very good scripting knowledge using TCL, Python and/or Perl, DFT experience would be a plus
- Proven experience using various CAD tools like Innovus or Genus
- Fluent in English
Please send us your CV in English.
Please note that:
- Subject to meeting all job requirements, belonging to protected categories under Law 68/99 will be considered a preferential requirement
Salary pay information:
Location Indicative salary range Padova, Italy €38.320 - €52.690
The stated salary comprises annual base pay and target variable compensation. The starting salary is determined using objective, gender neutral criteria, including relevant experience, qualifications, and role scope; prior compensation is not requested or considered. Employees also benefit from a comprehensive total rewards package, which may include further compensation and benefit elements depending on local regulations and company policies.
#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone.
We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.
Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.
Please let your recruiter know if you need any accommodations during the interview process.
Learn more about our various contact channels and about Diversity & Inclusion at Infineon.
Regan Lottering,