About this role
<b>Overview</b><br><div><p><span>Microsoft is building the fastest and most reliable networks for AI and cloud data centers. Microsoft Azure is one of the largest public cloud platforms worldwide, providing a great channel for product impact that touches the lives of millions of users daily. Microsoft’s partnership with world leaders in AI technology provides unparalleled opportunities for innovation at the cutting edge of high-performance computing and networking. </span><span> </span></p></div><div><p><span>Our team has delivered </span><a href="https://www.youtube.com/watch?v=j_X-oM4j3YE" target="_blank" rel="noreferrer noopener"><span>Azure Boost</span></a><span> to production through 2 generations and we are now looking for talented hardware design engineers to join our team, developing Azure’s next generation networking ASICs. </span><span> </span></p></div><div><p><span>Microsoft’s innovative approach for hardware/software co-design leverages custom-designed hardware to offload and accelerate many types of computations and functions of the Azure network. Our vertical work environment offers an unparalleled opportunity to define end-to-end features, implement & test them, participate in their deployment in the cloud, and see your work used on a global scale!</span><span> </span></p></div><div><p><span>Come join us and be challenged daily as you build advanced hardware/software acceleration solutions for some of the world’s largest datacenter networks and AI supercomputers. This is a great opportunity to join a team that has built some of the largest scale cloud systems ever deployed and learn from the very best.</span><span> </span></p></div><br><br><b>Responsibilities</b><br><div><ul style="list-style-type: square;"><li><p><span>Define and drive architecture and microarchitecture of Azure’s next-generation networking devices and features within them.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Serve as a source of knowledge and information for hardware design, verification and software engineers</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Own cross-unit hardware architecture and HW/SW interfaces, balancing system requirements, functionality, performance, cost, reliability, and implementation complexity.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Provide technical leadership across design, verification, performance, software, and physical design teams.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Drive complex system-level debug, silicon bring-up, and deployment to cloud production.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Mentor engineers and influence the technical direction of future products.</span><span> </span></p></li></ul></div><br><br><b>Qualifications</b><br><ul><li style="list-style-type: none;"><ul><li><div><ul style="list-style-type: square;"><li><p><span>10+ years demonstrated experience in ASIC design, verification, and/or architecture, preferably in the networking world.</span><span> </span></p></li><li><span>BSc/MSc/PhD in Electrical or Computer Engineering from a major university. </span><span> </span></li></ul><p><span>Other: </span></p></div><div><ul style="list-style-type: square;"><li><p><span>Proven background in hardware architecture, operating systems, I/O devices, networking.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Proven experience delivering complex ASIC features from architecture to silicon deployed at scale.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Proven analytical, problem-solving, and cross-team technical leadership skills.</span><span> </span></p></li></ul></div><div><ul style="list-style-type: square;"><li><p><span>Proven communication skills in English.</span><span> </span></p></li></ul></div></li></ul></li></ul><p> </p><ul><li>Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:<ul><li>Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter</li></ul></li></ul><p> </p><p>#azurecorejobs</p><p> </p> <br><p>This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.</p><br><hr><br><p>Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html"><b><u>requesting accommodations.</u></b></a></p>