Formal Verification Technical Lead

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products powered by Apple Silicon. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Do you have experience leading a System-on-a-chip (SoC) design verification effort collaborating with design? Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly and we are hiring all levels from junior to senior roles.

As a formal verification technical lead you'll work to identify targets and complete formal verification for single or multiple design blocks and IP’s (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.),

Minimum Qualifications

Outstanding team leading and communication skills and experience working with design and verification teams to identify FV candidates, develop test plans and perform data-centric verification closure
Hands on experience with VLSI and digital logic design and verification techniques
Advanced knowledge of SoC, CPU, GPU, or Cellular designs
Developed formal property proofs on industrial strength designs and architectures
Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms
Confirmed understanding of formal verification technologies/abstraction techniques
Knowledge and experience in interpreting hardware specifications and using
Temporal logic assertion-based languages such as SVA or PSL
Experience in using EDA formal tools and tool development experience is a plus
Proficiency in any scripting language with excellent debugging skills
Extraordinary teammate with excellent interpersonal skills
Passionate about developing world-class/innovative formal verification solutions
Understanding of application processors (CPU/GPU), their Instruction Set Architectures (ISA), Memory Consistency Models (MCM) or Cache Coherence protocols is desirable but not necessary
Exposure to ARM type architectures is desirable but not necessary

Preferred Qualifications

MS / Ph.D in EE or CS is preferred