About this role
<b>Overview</b><br><div><p><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission. </span></p></div><div><p><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">The first party silicon firmware team develops the firmware that runs in Microsoft Azure custom silicon, including Cobalt and MAIA. Within SCHIE, our team builds shared firmware components, drivers, and infrastructure that support secure platform bring-up and reliable operation across these silicon programs. </span></p></div><div><p><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">We are seeking a <strong>Principal Firmware Engineer</strong> to define firmware architecture and requirements that align with Azure features, partner closely with silicon and board design teams, and help shape the platform capabilities that enable secure, scalable, and high-performance cloud services. </span></p></div><div><p><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">#SCHIE </span></p></div><br><br><b>Responsibilities</b><br><div><ul><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Provide firmware requirements and architectural guidance to hardware teams, including silicon design, board design, and platform integration teams. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Create firmware architecture and requirements that align with Azure features, service needs, and platform roadmap priorities. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Define and maintain firmware subsystem interfaces, dependencies, and design principles for first party silicon programs. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Partner with silicon architects, board engineers, and firmware developers to ensure firmware requirements are feasible, testable, and complete. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Develop security requirements and threat models for firmware features, platform capabilities, and cross-domain interfaces. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Drive architecture reviews and technical decisions for firmware capabilities across boot, platform initialization, manageability, security, telemetry, and recovery flows.</span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Establish requirements for firmware that supports Microsoft Azure custom silicon programs such as Cobalt and MAIA. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Collaborate with cross-functional teams to ensure firmware designs support reliability, performance, security, and operational excellence at cloud scale. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Influence design tradeoffs early in the product cycle to reduce integration risk and improve long-term firmware maintainability. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Support validation planning by defining expected firmware behavior, feature coverage, and acceptance criteria for platform bring-up and release readiness. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Diagnose complex architecture and integration issues across silicon, board, and firmware boundaries. </span></li><li><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Design, implement, debug, and review shared firmware components and drivers with attention to memory management; improve automated tests, continuous integration, DevOps workflows, and developer efficiency; and contribute to Rust adoption and effective AI-assisted development practices. </span></li></ul></div><br><br><b>Qualifications</b><br><div><div id="tor__fcust_extintJobRequirements_readOnlyDiv"><div id="tor__fcust_extintJobRequirements_content"><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Required Qualifications:</strong></span></p><ul style="list-style-type: disc;"><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience</span><ul style="list-style-type: disc;"><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience</span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">OR equivalent experience. </span></li></ul></li></ul><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Other Requirements:</strong></span></p><ul style="list-style-type: disc;"><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings:</span><ul style="list-style-type: disc;"><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.</span></li></ul></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. </span></li></ul><p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Preferred Qualifications:</strong></span></p></div></div></div><div><div><div><ul><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Strong coding experience in C, C++, Rust, or similar low-level programming languages used for firmware and embedded systems. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Demonstrated experience defining firmware architecture and requirements for complex hardware platforms. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience working with silicon design teams, board design teams, or other hardware engineering partners. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience translating product or cloud service requirements into firmware specifications and technical design decisions. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience writing, debugging, and reviewing code for boot firmware, embedded runtime, or platform initialization components. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Ability to communicate effectively across technical and non-technical audiences and influence cross-functional partners. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">10+ years of experience in firmware, embedded systems, or hardware platform architecture. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience with Python or other scripting languages used for automation, validation, and tooling. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience working in pre-silicon environments. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience with boot firmware, platform initialization, recovery, telemetry, security, and manageability features. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience with RTOS-based firmware development. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Familiarity with hardware interfaces and protocols such as PCIe, I3C, I2C, SPI, and USB. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience working with Azure service teams and aligning platform firmware to service requirements. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Strong understanding of hardware/software co-design and feature bring-up on custom silicon platforms. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience influencing architecture across multiple engineering teams and product groups. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience performing low-level debugging, performance analysis, and root cause analysis in code spanning silicon and board boundaries. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Experience with firmware validation, platform debugging, and root cause analysis across silicon and board boundaries. </span></li><li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-size: 10pt; font-family: arial, helvetica, sans-serif;">Proven ability to operate in ambiguous environments and drive clear technical direction.</span></li></ul></div></div></div> <br><br><p>Firmware Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year. </p><p></p> <p>Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:<br><a href="https://careers.microsoft.com/us/en/us-corporate-pay">https://careers.microsoft.com/us/en/us-corporate-pay</a></p><br><p>This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.</p><br><hr><br><p>Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html"><b><u>requesting accommodations.</u></b></a></p>