About this role

Overview Microsoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Skype, OneDrive and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions.Join Microsoft Azure s Firmware Center of Excellence to define the future of pre-silicon software development for Microsoft custom silicon. This Principal Modeling Architect is a cross-program technical leader who solves hard system-level problems, establishes scalable architecture and engineering patterns, and then transitions execution ownership to development teams and junior engineers for long-term delivery. Responsibilities Technical Leadership and Strategy<ul><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Lead resolution of complex system-level challenges spanning virtual platforms, firmware, silicon architecture, validation infrastructure, software enablement, and hybrid execution environments.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Define architectural direction for SystemC/TLM-based virtual platforms supporting multiple generations of Azure silicon.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Identify technical risks, technology gaps, and scaling challenges across programs, then drive practical solutions that can be adopted by multiple teams.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Establish engineering standards, modeling practices, reusable frameworks, debug strategies, and validation approaches that improve quality and reduce duplicated effort.</li></ul> Cross-Program Architecture and Influence<ul><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Work across multiple silicon programs as a shared technical leader and subject matter expert.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Define reusable platform capabilities across Azure hardware initiatives rather than creating one-off project-specific implementations.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Influence silicon architecture, firmware readiness, validation methodologies, and platform bring-up strategy through early technical engagement.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Drive alignment across architecture, design verification, firmware, operating system, emulation, prototyping, and platform teams without relying on direct authority.</li></ul> Modeling and Firmware Enablement<ul><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Design and develop SystemC/TLM-2.0 models for complex SoC subsystems including PCIe, memory, boot infrastructure, compute clusters, interconnect, and platform services.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Develop and debug low-level firmware and validation software running on virtual platforms.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Support firmware bring-up activities including UEFI, Windows Boot, PCIe initialization, platform enumeration, early driver enablement, and operating system integration.</li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Debug complex interactions spanning hardware, firmware, operating systems, virtualization environments, simulation infrastructure, host systems, and modeling frameworks.</li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Analyze and optimize simulation performance, scalability, usability, and debug productivity across large SoC and multi-SoC environments.</li></ul> Hybrid Platform Strategy<ul><li style="font-size: 12pt; font-family: verdana, geneva, sans-serif;">Contribute to architectural integration of virtual platforms with emulation and prototyping systems including ZeBu, HAPS, Helium, Palladium, and Protium.</li><li style="font-size: 12pt; font-family: verdana, geneva, sans-serif;">Help define Microsoft s long-term hybrid development strategy by combining simulation, emulation, and prototyping technologies to scale pre-silicon software development and validation capacity.</li><li style="font-size: 12pt; font-family: verdana, geneva, sans-serif;">Partner with DV, firmware, architecture, and platform teams to determine where virtual models, emulation, FPGA prototyping, and hybrid flows provide the most value.</li></ul> Mentorship and Organizational Scale<ul><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Mentor engineers through design reviews, architecture guidance, technical coaching, and hands-on problem solving.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Prototype, prove, and de-risk complex solutions before transitioning ownership to development teams for long-term execution.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif;">Build organizational capability by enabling junior and senior engineers to understand, maintain, and extend solutions after initial architecture direction is established.</li><li style="font-size: 12.0pt; font-family: verdana, geneva, sans-serif; text-align: justify;">Raise engineering quality by promoting reusable, maintainable, scalable solutions rather than short-term fixes.</li></ul> Qualifications Required Qualifications:Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. Other Requirements:<ul style="list-style-type: disc;"><li style="font-family: verdana, geneva, sans-serif;">Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: <ul style="list-style-type: disc;"><li style="font-family: verdana, geneva, sans-serif; color: black;">Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.</li><li style="color: black;">This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.</li></ul></li></ul> Preferred Qualifications: <ul style="margin-top: 0.0in; margin-bottom: 0.0in;"><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience with coding OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience with coding OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience with coding OR equivalent experience.</li><li>3+ years experience leading technical projects beginning-to-end. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience developing complex software systems using C/C++. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience in firmware, systems software, silicon development, virtual platforms, or pre-silicon development environments. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience working across hardware, firmware, and software boundaries. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience leading technical projects from architecture through delivery. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience debugging, root-cause analysis, and technical problem-solving skills.</li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience with SystemC and TLM-2.0 modeling. </li><li style="margin: 0.0in 0.0in 0.0in 0.0px; font-size: 12.0pt; font-family: verdana, geneva, sans-serif; color: black;">Experience with Synopsys Virtualizer, Arm Fast Models, Cadence Helium, or similar virtual platform technologies.</li></ul> #AHSI#SCHIE Firmware Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: <a href="https://careers.microsoft.com/us/en/us-corporate-pay">https://careers.microsoft.com/us/en/us-corporate-pay</a> This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. <hr> Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about <a href="https://careers.microsoft.com/v2/global/en/accessibility.html">requesting accommodations.</a>