Software Engineer, LLVM Compiler

We are seeking a software engineer to join the MTIA LLVM Compiler team, working on the compiler toolchain for Meta's custom silicon AI accelerators. You will be part of our efforts to architect, design, and implement a production compiler stack targeting next-generation deep learning hardware. The team includes compiler, machine learning, firmware, and ASIC experts, and the work spans from compiling PyTorch models through LLVM-based intermediate representations down to optimized binaries for hardware accelerator blocks.

Responsibilities

Design and implement LLVM compiler passes, including optimization, lowering, and code generation stages targeting ML accelerator backends
Analyze and improve compiler-generated code quality through profiling, benchmarking, and performance instrumentation across ML workloads
Develop and maintain LLVM IR transformations that enable efficient mapping of ML computation graphs to hardware execution units
Collaborate with hardware architecture and ML framework teams to define compiler interfaces and ensure correctness of generated code on custom silicon targets
Identify and resolve correctness and performance regressions through systematic debugging, root cause analysis, and targeted fixes in the compiler pipeline
Own the technical design of compiler components, evaluating trade-offs between compilation time, runtime performance, and code size for ML inference and training workloads
Build and improve automated testing frameworks and benchmarking infrastructure to validate compiler correctness and track performance across hardware generations
Drive adoption of compiler best practices and coding standards across the team, contributing to documentation and engineering process improvements
Partner with ML engineers and researchers to understand model-level performance requirements and translate them into actionable compiler optimization strategies
Mentor other engineers on compiler internals, LLVM architecture, and ML-specific code generation techniques

Qualifications

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
5+ years of experience developing compilers or code optimization software, with demonstrated technical leadership
Proficiency in C++ or Rust with experience in large-scale software development, debugging, testing, and performance analysis
Experience working within the LLVM/MLIR compiler infrastructure or a comparable production compiler codebase (e.g., GCC, MSVC)
Track record of designing and delivering significant compiler features or optimization passes end-to-end
Experience driving cross-team technical initiatives and influencing roadmap decisions
Experience crossing multi-disciplinary boundaries (hardware, ML frameworks, runtime systems) to drive optimal system-level solutions
Experience in AI framework development or accelerating deep learning models on hardware architectures
Demonstrated ability to mentor engineers and raise the technical bar of a team Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Experience working closely with hardware architectures such as SIMD, GPU, RISC-V, and AI accelerators
Familiarity with a mainstream ML framework such as PyTorch, TensorFlow, or MLIR-based ML toolchains
Experience contributing to the upstream LLVM or MLIR projects
Experience with deep learning model compilation, graph compilers, or ML-specific optimization techniques (e.g., operator fusion, tiling, quantization-aware compilation)
Experience with hardware-specific optimization for accelerators, GPUs, or DSPs
Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
Experience working and communicating cross-functionally in a team environment
Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
Experience with machine-code generation and back-end compiler optimizations such as instruction selection, register allocation, and instruction scheduling