Silicon Photonics Packaging Engineer Co-op

NokiaUnited StatesOn-siteCo-opListed 4 hours ago

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About this role

Number of Positions: 2
Duration : 4 months
Date : January 2027-June 2027
Location: Onsite in Sunnyvale, CA,

Education Recommendations

Current M.S. or Ph.D. student in electrical engineering, physics, applied physics, or other similar fields with an accredited university in the USA.

- Experience with package and process design/development from design to production.
- Knowledge of design for manufacturing, 2.5D/3D packaging, and TSVs.
- Experience with documentation of fabrication, inspection, and assembly processes.
- Solid interpersonal, communication and problem-solving skills in order to interact with engineering staff, external vendors and contractors effectively.

It would be nice if you also had:

- Understanding of optical epoxies, non-hermetic packaging, and high-volume packaging and thermal analysis of 2.5/ 3D packages.
- Experience in the semiconductor chip and wafer-level back-end processing, assembly, and/or packaging.
- Experience in high-speed electronics package design and/or laser package design.
- Experience with thermo-mechanical simulations using ANSYS or similar software.
- Experience with metrology techniques such as SEM/XSEM, confocal microscopy, or acoustic imaging.
- Familiarity with design and simulations of optical packaging using free space optics or fiber coupling.