About this role
Principal / Sr Principal DFT design Engineer
Exp : 10-14 Years
We are seeking a skilled Design for Test (DFT) Principal / Sr Principal / Architect/Lead/Manager to join our team. This role is pivotal in ensuring the testability and manufacturability of our ASIC/SoC products designed for the automotive, Industrial & Consumer applications. The ideal candidate will have extensive experience in DFT methodologies and will lead a team of engineers to develop robust test strategies that meet industry standards.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
10 - 15+ years of experience in DFT for ASIC/SoC design, with a strong background in automotive applications.
Proven experience leading DFT teams and managing complex projects.
Experience in post silicon debug, yield improvement and On-field failure (EFAR) debug.
In-depth knowledge of DFT techniques such as scan design, boundary scan, BIST, and fault simulation.
Familiarity with automotive industry standards and regulations (e.g., ISO 26262).
Proficiency in using DFT tools and EDA software.
Strong problem-solving skills and ability to work collaboratively in a fast-paced environment.
Excellent communication skills, both verbal and written.